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[VHDL-FPGA-Verilog] fir-filter

Description: 11阶fir数字滤波器的verilog程序设计，线性相位，系数量化处理-11 order of fir digital filter verilog programming, linear phase, the coefficient quantization
Platform: | Size: 59392 | Author: happy | Hits:

[VHDL-FPGA-Verilog] FIR

Description: 10阶的F.I.R滤波器设计的 verilog代码-Verilog code for the 10-order FIR filter design
Platform: | Size: 1024 | Author: lubianke | Hits:

[VHDL-FPGA-Verilog] verilog-fir

Description: 基于verilog的三种不同方式的fir滤波器 fir1:直接型 fir2：串行DA fir3：并行DA-Fir filter for the verilog three different ways fir1: direct type fir2 of: serial of DA fir3: parallel DA
Platform: | Size: 2048 | Author: | Hits:

[Industry research] 8-channel-FIR

Description: b channel FIR filter verilog
Platform: | Size: 113664 | Author: jeren1228 | Hits:

[VHDL-FPGA-Verilog] fir

Description: 用Verilog语言设计的一个数字FIR低通滤波器，很实用，通过modelsim仿真成功-Verilog language to design a digital FIR low-pass filter, very practical, through modelsim simulation success
Platform: | Size: 1685504 | Author: liu | Hits:

[MPI] CIC_fir-Verilog

Description: 本程序是一个CIC滤波器设计，有助于初学者对滤波器设计设计有一个初步的了解-CIC fir
Platform: | Size: 1024 | Author: colin | Hits:

[Other] FIR

Description: 一个不错的数字滤波器verilog源码，希望大家能用的上-A good digital filter verilog source
Platform: | Size: 12288 | Author: zhang | Hits:

[VHDL-FPGA-Verilog] fpga-fir

Description: xlinx fpga 利用verilog语言实现fir滤波器功能，完整ise工程文件直接可以使用-xlinx fpga verilog language the fir filter function, complete ise project file can be used directly
Platform: | Size: 1006592 | Author: bambod | Hits:

[VHDL-FPGA-Verilog] fir

Description: 16阶的FIR滤波器的verilog文件，包含了测试报告。-16 order FIR filter verilog file contains a test report.
Platform: | Size: 41984 | Author: luna | Hits:

[VHDL-FPGA-Verilog] fir

Description: 利用VHDL和Verilog HDL语言实现FIR滤波器-Using VHDL and Verilog HDL language to realize FIR filter
Platform: | Size: 49152 | Author: 姚远 | Hits:

[Software Engineering] verilog

Description: 最长的那个句子，求sum的赋值语句就是FIR滤波器的计算过程，将二进制乘法转化为移位运算。对于小数点后的乘数是向左移，小数点前的乘数是往右移位。 -The longest sentence, find the sum of the assignment statement is the calculation of the FIR filter, the binary multiplication into shift operation. Multiplier after the decimal point to the left, in front of the decimal point multiplier is shifted to the right.
Platform: | Size: 1024 | Author: jee | Hits:

[VHDL-FPGA-Verilog] FIR

Description: 基于fpga的FIR滤波器设计,已通过modesim仿真结果正确,verilog编写-Fpga-based FIR filter design, has passed modesim simulation results are correct, verilog prepared
Platform: | Size: 586752 | Author: zengdeqian | Hits:

[VHDL-FPGA-Verilog] FIR

Description: 使用Verilog语言编写的FIR滤波器,在Xilinx Spartan-6上运行通过,是很好的Verlog程序-Using Verilog language FIR filter, the Xilinx Spartan-6 run through, is a very good program Verlog
Platform: | Size: 8192 | Author: 于洋 | Hits:

[Other] Verilog---A-Guide-to-Digital-Design-and-Synthesis

Description: hdl file fir vlsi book
Platform: | Size: 9036800 | Author: som | Hits:

[VHDL-FPGA-Verilog] matlab-and-verilog-fir4_3

Description: 四抽头FIR滤波器matlab,verilog顶层，子模块，以及testbench代码-Four tap FIR filter matlab, verilog top, sub modules, as well as the testbench code
Platform: | Size: 8192 | Author: 李静 | Hits:

[VHDL-FPGA-Verilog] FIR

Description: 用Verilog HDL实现FIR滤波器的功能，文件包括Verilog HDL的源代码。-Using Verilog HDL realize the FIR filter function, the file includes Verilog HDL source code.
Platform: | Size: 15360000 | Author: 雪洁 | Hits:

[VHDL-FPGA-Verilog] FIR

Description: FPGA设计在设计过程中使用ISE软件自带的IP核时，消耗资源太大的时候，需要自己编写滤波器的源代码，这里给出我们常用的串行FIR核的verilog语言代码设计文件，并通过作者时序仿真验证，并用于实际的项目中。-The FPGA design in the design process of ISE software used to own the IP core, consume resources is too big, need to write your own source code of the filter, presented here we commonly used serial FIR the verilog language code design document, and through the author timing simulation, and used for actual projects
Platform: | Size: 6000640 | Author: lirui | Hits:

[VHDL-FPGA-Verilog] FIR

Description: 基于Verilog的FIR滤波器的设计，该代码包含完整的工程，可以利用quartus软件直接运行-Design of FIR filter based on Verilog, the code contains a complete project, can use quartus software to run directly
Platform: | Size: 165888 | Author: 张林 | Hits:

[Other] Verilog-135-classic-design

Description: verilog的135个经典设计，适合初学者自学。内有FIR、数字钟、交通灯、串转并、ram、rom等等常用模块的完整verilog代码，以及测试程序。还有基本的设计源码-verilog of 135 classic design, suitable for beginners learning. There are FIR, complete verilog code for a digital clock, traffic lights, and turn string, ram, rom, etc. commonly used modules, and test procedures. There are basic design source
Platform: | Size: 116736 | Author: 王凌 | Hits:

[Software Engineering] CODE-for-FIR-filter

Description: code for FIR filter using verilog hardware descrption language
Platform: | Size: 1024 | Author: ARULKUMAR | Hits:
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